Object structure

Title:

Energy characteristic of a processor allocator and a Network-on-Chip

Group publication title:

AMCS, Volume 21 (2011)

Creator:

Zydek, Dawid ; Selvaraj, Henry ; Borowik, Grzegorz ; Łuba, Tadeusz

Subject and Keywords:

CMP ; PA ; energy model ; processor allocation

Abstract:

Energy consumption in a ChipMultiProcessor (CMP) is one of the most important costs. It is related to design aspects such as thermal and power constrains. Besides efficient on-chip processing elements, a well-designed Processor Allocator (PA) and a Network-on-Chip (NoC) are also important factors in the energy budget of novel CMPs. In this paper, the authors propose an energy model for NoCs with 2D-mesh and 2D-torus topologies. All important NoC architectures are described and discussed. Energy estimation is presented for PAs. ; The estimation is based on synthesis results for PAs targeting FPGA. The PAs are driven by allocation algorithms that are studied as well. The proposed energy model is employed in a simulation environment, where exhaustive experiments are performed. Simulation results show that a PA with an IFF allocation algorithm for mesh systems and a torus-based NoC with express-virtual-channel flow control are very energy efficient. Combination of these two solutions is a clear choice for modern CMPs.

Publisher:

Zielona Góra: Uniwersytet Zielonogórski

Contributor:

Korbicz, Józef - red. ; Uciński, Dariusz - red.

Date:

2011

Resource Type:

artykuł

DOI:

10.2478/v10006-011-0029-7

Pages:

385-399

Source:

AMCS, Volume 21, Number 2 (2011)

Language:

eng

Rights:

Biblioteka Uniwersytetu Zielonogórskiego