Creator:

Gosti, Wilsin ; Villa, Tiziano ; Saldanha, Alex ; Sangiovanni-Vincentelli, Alberto L.

Contributor:

Korbicz, Józef (1951- ) - red.

Title:

FSM encoding for BDD representations

Group publication title:

AMCS, volume 17 (2007)

Subject and Keywords:

binary decision diagram ; encoding ; finite state machine ; logic synthesis ; formal verification ; logic representation

Abstract:

We address the problem of encoding the state variables of a finite state machine such that the BDD representing the next state function and the output function has the minimum number of nodes. We present an exact algorithm to solve this problem when only the present state variables are encoded. We provide results on MCNC benchmark circuits.

Publisher:

Zielona Góra: Uniwersytet Zielonogórski

Date:

2007

Resource Type:

artykuł

DOI:

10.2478/v10006-007-0011-6

Pages:

113-128

Source:

AMCS, volume 17, number 1 (2007)

Language:

eng

License CC BY 4.0:

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Rights:

Biblioteka Uniwersytetu Zielonogórskiego