Korbicz, Józef - red. ; Uciński, Dariusz - red.
Energy consumption in a ChipMultiProcessor (CMP) is one of the most important costs. It is related to design aspects such as thermal and power constrains. Besides efficient on-chip processing elements, a well-designed Processor Allocator (PA) and a Network-on-Chip (NoC) are also important factors in the energy budget of novel CMPs. In this paper, the authors propose an energy model for NoCs with 2D-mesh and 2D-torus topologies. All important NoC architectures are described and discussed. Energy estimation is presented for PAs. ; The estimation is based on synthesis results for PAs targeting FPGA. The PAs are driven by allocation algorithms that are studied as well. The proposed energy model is employed in a simulation environment, where exhaustive experiments are performed. Simulation results show that a PA with an IFF allocation algorithm for mesh systems and a torus-based NoC with express-virtual-channel flow control are very energy efficient. Combination of these two solutions is a clear choice for modern CMPs.
Zielona Góra: Uniwersytet Zielonogórski
AMCS, Volume 21, Number 2 (2011) ; kliknij tutaj, żeby przejść
Biblioteka Uniwersytetu Zielonogórskiego
2021-09-07
2018-08-24
119
https://zbc.uz.zgora.pl/publication/55023
Nazwa wydania | Data |
---|---|
Energy characteristic of a processor allocator and a Network-on-Chip | 2021-09-07 |
Noor Aina, Mahomad Zuki Sin, Jing Yao Jada, Amane Dashti, Fereidonian Fatehah, Mohd Omar Kuczyński, Tadeusz - red.
Łuba, Tadeusz Lasocki, Robert Korbicz, Józef - red. Uciński, Dariusz - red.
Nyćkowiak, Justyna Dubrow, Joshua Kjerulf Kołodziej, Tomasz Bazuń, Dorota - red. Kwiatkowski, Mariusz - red.
Kosowska-Gąstoł, Beata Kruk, Aleksandra - red.
Staffans, Olof J. Curtain, Ruth - ed. Kaashoek, Rien - ed.